The present invention relates to a graphic information processing system having a reduced instruction set computer (hereinafter referred to as "RISC") central processing unit (CPU) in a digital information processing system, and more particularly, one capable of effectively processing a great deal of data generated in the use of windows and graphical processing.
Computers, word-processors, and CAD/CAM systems are generally referred to as digital information processing systems, which process information digitally. Each such system displays graphical information processed in an external host computer in a plurality of windows on display via inter-communication with the external host computer, and transmits the information produced by an input device to the host computer.
Here, the windows previously mentioned refer to a rectangular region into which the graphic information processed in the computer is mapped according to window viewport transformation. Generally, window viewport transformation also refers to a transformation map of a figure within a rectangle region parallel to the coordinate axis in a coordinate system, into the rectangle region parallel to the coordinate axis in the same or other coordinate system, while preserving the relative scale of the coordinates.
To display a plurality of windows on the type of display previously described and process a great deal of data produced in a window graphic environment, there is needed a system capable of processing graphic information from a host computer or a great deal of information generated by an input event.
The accompanying drawing FIG. 1 is a schematic block diagram illustrating a graphic information processing system according to prior art. Each major element shown in FIG. 1 is connected to buses for data transmission among them. The buses serve as a path by which data and instructions that are processed and executed at respective devices, are transmitted.
In this configuration, all instructions and data input from the input devices are transmitted to a host computer or memory devices through a bus, and information processed in the host computer is also transmitted to a corresponding graphic information processing system of each terminal. In the above-mentioned graphic information processing system, a complex instruction set computer (hereinafter referred to as a "CISC") CPU 20 takes charge of the whole operation of the system. A read only memory (ROM) 30 stores a program for booting the system, a random access memory (RAM) 10 stores the instructions and data of programs for carrying out the function of the system, and a non-volatile RAM (hereinafter referred to as an "NVRAM") 40 preserves system settings, i.e., initial settings for each component and primary characteristic data thereof, even when there is no power supplied.
The system is connected with the host computer via a network 82, and drives a network controller 81 so as to inter-communicate either data required by the system or that generated by the host computer. The system employs a buffer memory 80 in order to execute an effective data processing and shorten the waiting time of the CPU. Graphic data generated by the host computer is transmitted to a video memory 60 after processing in CISC CPU 20, while a video controller 61 displays information from video memory 60 on a monitor 62. As the case is, a processor for graphic exclusive processing use is employed to effectively process graphic data. Information is input to the system via a mouse 71 or a keyboard 91, and auxiliary port 72 is provided for connection with miscellaneous input/output devices or communication with the host computer besides network 82, which is driven by serial input/output unit 70 and keyboard controller 90. In addition, a speaker 50 is provided for audio output.
In the prior art as previously explained, graphic data transmitted via the network by a host computer is fed to video memory 60 via the bus after processing in CISC CPU 20. Data generated by an input/output device is transmitted to respective devices via the bus after processing in CISC CPU 20. Data processed in a system itself is also transmitted via the bus to the respective devices after processing in CISC CPU 20. Namely, since this data is being transmitted via one bus and overall operation of the terminal is controlled by CISC CPU 20, when the graphic information processed in a host computer is displayed on a plurality of windows on display, the quantity of information to be processed at the terminal and that to be communicated with the host computer becomes much larger than that of the system, which mainly processes characters. This results in a bottleneck in the flow of data because a plurality of clock cycles are needed to execute one instruction, and is due to the characteristics of the CISC CPU.
Further, such a problem can not be solved effectively even if a processor for graphic exclusive processing is additionally employed to effectively process the graphic information, which would result in advanced cost. Moreover, once graphic processing is executed simultaneously using a plurality of windows requiring high resolution of displays, then the terminal's performance gets worse.